In recent years, active matrix liquid crystal display devices, which have advantages of being thin and lightweight, capable of low-voltage drive, and small in power consumption, have been widely used as display panels for mobile terminal equipment such as mobile phones and handheld game machines and various electronic equipment such as notebook computers.
Such an active matrix liquid crystal display device includes, in its main portion, a liquid crystal display panel as a display section having a plurality of pixels arranged in a matrix and drive circuits for the display panel. In the liquid crystal display panel, a plurality of data signal lines (hereinafter referred to as “source bus lines”) and a plurality of scanning signal lines (hereinafter referred to as “gate bus lines”) are formed to intersect each other in a lattice shape, and also a plurality of storage capacitance lines are formed to extend in parallel with the plurality of gate bus lines. One pixel corresponds to each of intersections between the plurality of source bus lines and the plurality of gate bus lines. The liquid crystal display panel also includes a common electrode (or a counter electrode) placed in common for the plurality of pixels arranged in a matrix to face pixel electrodes of the pixels via a liquid crystal layer.
FIG. 13 is an equivalent circuit diagram showing an electrical configuration of one pixel in the liquid crystal display panel of the liquid crystal display device described above. Each pixel includes: a thin film transistor (hereinafter abbreviated as a “TFT”) 52 as a switching element having a source electrode connected to a source bus line 50 passing through an intersection corresponding to this pixel and a gate electrode connected to a gate bus line 51 passing through the intersection; and a pixel electrode 53 connected to a drain electrode of the TFT 52. A liquid crystal capacitance Clc is formed by the pixel electrode 53 and a common electrode 54, and a storage capacitance Cs is formed by the pixel electrode 53 and a storage capacitance line formed along the gate bus line 51. The liquid crystal capacitance Clc and the storage capacitance Cs constitute a pixel capacitance for holding a voltage indicating the pixel value that should be provided by the pixel. Also, a parasitic capacitance Cgd is formed between the pixel electrode 53 and the gate bus line 51.
With the presence of the parasitic capacitance Cgd between the gate bus line 51 and the pixel electrode 53 in each pixel, during the time when a data signal is being applied to the source bus line, the potential (pixel potential) Vd of the pixel electrode 53 has a level shift ΔVd caused by the parasitic capacitance Cgd at the time of fall of the voltage of a scanning signal from an ON voltage Vgh of the gate bus line 51 to an OFF voltage Vgh thereof. This level shift ΔVd, which is called a “field through voltage” or a “pull-in voltage,” is represented by:ΔVd=(Vgh−Vgl)·Cgd/(Clc+Cs+Cgd)   (1)
Such a pull-in voltage ΔVd causes occurrence of flicker, display degradation, etc. on a displayed image. In general, in a liquid crystal display panel driven with TFTs, flicker tends to occur when an asymmetric voltage is applied to the liquid crystal layer, greatly degrading the display quality, and moreover causing image sticking if the flicker is left unattended for a long time.
Also, in general, a liquid crystal display device is AC-driven where a positive voltage and a negative voltage are alternately applied to liquid crystal because liquid crystal is degraded with application of a DC voltage over a long time. Types of the AC drive include frame inversion drive, line inversion drive, and dot inversion drive. In the AC drive, the voltage applied to the common electrode (hereinafter such a voltage is referred to as the common electrode voltage Vcom) is kept constant, or the level of the common electrode voltage Vcom is changed.
If the common electrode voltage Vcom shifts slightly, for example, the potentials of all pixels will shift in the same direction when all the pixels are of the same polarity. Therefore, the entire screen will become bright and then dark frame by frame repeatedly, and as a result, a large flicker will occur. In view of this, in a liquid crystal display panel driven with TFTs, the dot inversion drive where the voltages applied to any adjoining pixels are opposite in polarity and the polarity of each pixel is inverted every frame is widely used. By inverting the polarity every dot (i.e., every pixel), any adjoining pixels constitute a set of a bright pixel and a dark pixel. Therefore, the change in brightness can be cancelled to some extent, and thus, as a whole, flicker can be reduced to some extent.
Various schemes of dot inversion drive, not limited to the simple dot inversion drive, have been recently proposed. Basically, however, these schemes are common in that, in the same frame, while the polarity of the potential is positive in some of the pixel electrodes in the panel plane, it is negative in the other (see Patent Document 1, for example).
In general, in the dot inversion drive, which is a drive for rendering flicker less discernable, setting of the common electrode voltage Vcom is difficult. In view of this, setting of the common electrode voltage Vcom may be made in a display of the same polarity over the entire screen using a dot checkered pattern that renders flicker discernible. The dot checkered pattern is a display pattern of allowing only pixels of the same polarity to light up, where gray level 0, or a gray level close to 0, is written into pixels that do not light up. Pixels light up every other dot in the horizontal and vertical directions in the case of the dot inversion drive.
It appears possible to set the common electrode voltage Vcom and the potentials of the source bus lines so that flicker is minimized by a theoretical method. Actually, however, the setting does not go according to calculation due to a slight deviation of a finished size from its design value, etc. In view of this, a technique has been proposed where a pattern of the same gray level (hereinafter referred to as a “solid pattern”) is actually displayed on the entire panel plane (i.e., all pixels) of a liquid crystal display panel, and the common electrode voltage Vcom is changed while this pattern is being displayed, to find the common electrode voltage Vcom at which flicker is minimum, and then determine the potentials (see Patent Document 2, for example).
As described above, methods of adjusting the common electrode potential Vcom or the potentials supplied to the source bus lines while displaying a pattern rendering flicker discernible have been generally adopted.